1. Field of the Invention
The present invention relates to a power control apparatus which supplies power to a CPU (Central Processing Unit) and other constituent elements after performing reset release of the CPU at the time of power-on, an electronic apparatus equipped with such power control apparatus, and a portable communications terminal equipped with such power control apparatus.
2. Description of Related Art
In an electronic apparatus which performs operation control of devices and the like by means of a CPU, a power management IC has heretofore performed reset release of the CPU and control of the power-on of a regulator at the time of power-on, for example, at the time of attachment of a battery to the electronic apparatus or at the time of connection of the electronic apparatus to a power receptacle. Specifically, at the time of power-on, when the power management IC detects that a voltage value after power-on has become not less than a predetermined voltage value, the power management IC, after the lapse of a predetermined set time of a built-in delay circuit, performs reset release of the CPU and further causes the regulator to power-on so as to supply I/O power to an internal memory and the like of the CPU.
Japanese Laid-Open Patent Application No. HEI9-44468 (Patent Document 1 (FIG. 1)) discloses a control circuit which sets the circuit configuration (logic) of a backup hardware circuit to be managed by a microcomputer, before the start of operation of the microcomputer. In other words, in this control circuit, a non-volatile memory for setting the circuit configuration is provided in its hardware circuit, and the circuit configuration of the hardware circuit is set in accordance with the data stored in the non-volatile memory, before the microcomputer starts operation after power-on. Therefore, according to this control circuit, it is possible to complete the setting of the circuit configuration of the hardware circuit before the start of operation of the microcomputer, whereby it is possible to compatibly realize the prevention of malfunctions in systems and an increase in processing speed.